Senior PDK Development Engineer
The role of the Senior PDK Development Engineer is to develop and maintain high-quality physical verification components and lead Calibre Physical Verification runset implementation for our wafer technologies.
Key Responsibilities
* Develop and maintain physical verification components ensuring they meet the highest standards of quality and performance.
* Lead the implementation of Calibre DRC, ERC, LVS, and PERC Physical Verification runsets for our wafer technologies.
* Collaborate with device development and modelling teams to ensure seamless integration of device verification, extraction, and quality assurance processes.
* Implement and apply automated quality assurance checks to ensure the accuracy and reliability of our verification tools.
* Create user documentation and provide support to the design community.
Requirements
To be successful in this role, you will require:
* A university degree in Electrical Engineering or Computer Science.
* At least 3 years of experience in PDK development, preferably in a Cadence-based design flow.
* Profound experience of developing physical verification rule decks (DRC, LVS, PRE).
* Programming skills: Calibre SVRF, Cadence Skill, Python, Tcl, Perl, Scripting.
* Experience with Unix/Linux.
* Exposure to working with multi-cultural and cross-functional teams.
* Good English skills, German skills as a plus.
Benefits
This position offers a competitive salary paid 14 times per year. A higher payment is negotiable depending on your expertise and skills. Additionally, Infineon offers a range of employee benefits.
Work Environment
Our team operates in an international environment with over 4700 colleagues from more than 70 nations. You will have the opportunity to work in a dynamic and collaborative atmosphere.