Lead Digital Design Engineer (ASIC / SoC / Silicon IC)
About the Company
Our client is a global semiconductor technology company developing advanced connectivity and embedded solutions used across next‑generation applications including wireless communication, IoT, smart devices, industrial systems, and automotive technologies.
They are currently seeking an experienced Lead Digital Design Engineer to join a highly innovative international R&D team focused on custom silicon and advanced IC development.
This role is ideal for a senior engineer who enjoys remaining deeply hands‑on while also providing technical leadership across complex ASIC and SoC development projects.
The Opportunity
This is not a traditional people management position. You will operate as a technical leader and subject matter expert, helping guide a team of approximately 8–10 engineers while maintaining hands‑on ownership of architecture, RTL implementation, top‑level integration, and silicon delivery.
You will work closely with cross‑functional teams including verification, DFT, firmware, physical design, systems, and analog engineering teams through the full development lifecycle from concept to tape‑out and silicon bring‑up.
Key Responsibilities
* Define digital architecture and translate system requirements into implementable specifications and top‑level design structures
* Lead RTL development and chip‑level integration activities
* Own top‑level design implementation including interfaces, clock/reset structures, test integration and HW/SW alignment
* Drive technical decisions across ASIC and SoC development projects
* Coordinate and provide technical leadership across a team of engineers
* Drive DFT readiness, timing constraints, CDC/RDC and overall sign‑off preparation
* Work closely with verification teams to support regression, debug, coverage review and verification closure
* Support tape‑out activities and post‑silicon debugging
* Coordinate design reviews, technical planning and project milestone activities
* Partner with multidisciplinary engineering teams to ensure successful product delivery
Requirements
* Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or related discipline
* 8+ years of experience within Digital IC, ASIC or SoC design environments
* Strong hands‑on RTL implementation experience using SystemVerilog or Verilog
* Deep understanding of ASIC development flows including synthesis, timing analysis, SDC constraints and DFT integration
* Strong experience with digital design and sign‑off tools including STA, lint, CDC and RDC
* Experience working with verification methodologies including UVM and regression environments
* Prior technical leadership experience or experience mentoring and guiding engineering teams
* Strong communication skills and ability to work across international teams
Nice to Have
* NFC or RFID domain experience
* Experience with AXI, AHB, APB, SPI, I2C or UART interfaces
* Exposure to wireless charging or mixed‑signal environments
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