About the Role
#WeAreIn for jobs that impact everyone's life. What if your ideas could change the way the world connects, powers up, or thinks? As an Staff Engineer Mixed Signal Layout (f/m/div) on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.
Responsibilities
* Full Custom Layout: Execute full-custom IC and block-level layout from schematic to tape‑out for high‑frequency RF blocks and high‑speed SerDes components
* Layout Optimization: Implement precise matching techniques and isolation strategies to prevent noise coupling in sensitive analog front‑ends
* Physical Verification: Run and debug full‑chip physical verifications including DRC, LVS, ERC, and Antenna rule checks
* Parasitic Management: Analyze and minimize parasitic resistance, capacitance, and inductance to ensure signal and power integrity at high frequencies
* Top‑Level Integration: Floorplanning, pad‑ring assembly, and final chip integration considering ESD, latch‑up, and electro‑migration (EM) guidelines
* Leadership & Mentorship: Provide technical leadership during project execution and mentor junior layout engineers within the team
Qualifications
* Education: A university (of applied sciences) degree in Electrical Engineering or comparable
* Experience: +5 years of hands‑on experience in CMOS and FinFET semiconductor technologies
* RF Expertise: Proven track‑record in analog/RF IC layout including high‑speed interfaces (e.g., PCIe, Ethernet, USB, or custom SerDes) operating at multi‑gigabit data rates
* Tool Expertise: High proficiency with industry‑standard EDA tools (Cadence Virtuoso, Siemens Calibre, …)
* Problem‑Solving: Excellent analytical skills to independently debug complex layout and physical verification issues
* Communication Skills: Excellent communication skills to bridge technical gaps across global, multi‑disciplinary engineering teams
* Leadership & Teamwork: Strong leadership skills with the ability to guide, motivate, and coordinate a small layout team during project execution and collaborate closely with RF Design Engineers
* Languages: Fluent in English
Benefits
We offer competitive salaries and additional benefits based on your performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment group G (link). The monthly salary is paid 14 times p.a. We offer a higher compensation depending on your expertise and skills.
We base our recruiting decisions on the applicant's experience and skills.
This role is inclusive and welcomes everyone for who they are. Infineon is committed to give all applicants and employees equal opportunities.
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