Senior Verification Engineer - Complex ASIC Project Opportunity
">
We are seeking an experienced Senior Verification Engineer to join our team. As a successful chip design house, we offer a wide range of engineering services in various markets such as automotive, audio, industrial, security and wireless.
You will have the opportunity to work on complex and challenging projects closely with other teams in Europe. Your main responsibilities include:
Main Responsibilities:
* Experience in UVM is required.
* You should have worked on several successful and complex ASIC projects.
* You should have knowledge of a programming language (Verilog or SystemVerilog).
* You should understand RTL design.
* You should be fluent in English.
About This Role
This is a fantastic opportunity for a skilled Verification Engineer to grow their career and take on new challenges. If you are interested in this role, please contact us.