Principal Engineer – Chip Architect (f/m/div)
Research & Development team – responsible for IC architecture in close cooperation with internal and external counterparts.
Key Responsibilities
* Define the future generation power management IC architectures
* Conduct feasibility studies to ensure proof of concept
* Closely cooperate with cross-functional project members such as marketing, application engineering, design, layout, lab and test engineers
* Define the verification and validation strategy of your chips
* Provide guidance to the development teams
Qualifications
* University degree in Electrical Engineering, Microelectronics, Physics or comparable field
* 6+ years of experience in integrated analog/mixed-signal design
* Good knowledge of analog/mixed-signal design flow (Cadence Virtuoso, AMS Designer)
* Experience in the area of power applications is a plus (e.g. hot swap controllers, eFuses, microcontrollers, gate drivers, isolated DC-DC / AC-DC converters)
* Experience with SystemVerilog or other RTL languages is an advantage
* Fluent English skills; German skills or willingness to learn German is a plus
Benefits
Competitive salaries and additional benefits based on performance, experience and qualification. The employment is in accordance with the collective salary and wage agreement for employees of the electrical and electronics industry, employment groupI. The monthly salary is paid 14 times per annum and may be higher depending on your expertise and skills.
Equal Employment Opportunity Statement
We embrace diversity and inclusion and welcome all who they are. We base our recruiting decisions on the applicant’s experience and skills. We are on a journey to create the best Infineon for everyone.
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